Open Position
1. PRINCIPAL SOC VERIFICATION ENGINEER
LOCATION: Los Altos, CA, USA
2. PRINCIPAL SOC DESIGN ENGINEER
LOCATION: Los Altos, CA, USA
3. AI CHIP SOC ARCHITECT
LOCATION: Los Altos, CA, USA
4. AI CHIP ARCHITECT
LOCATION: Los Altos, CA, USA
5. SOFTWARE ENGINEER, MACHINE LEARNING COMPILER
LOCATION: Los Altos, CA, USA
6. SENIOR SOFTWARE ENGINEER (MACHINE LEARNING)
Work location: 949 Sherwood Ave., Suite 200, Los Altos, CA 94022
Research, design, and develop a platform for automated model parsing, mapping optimization, instruction compiling and performance evaluation: (a) Develop inference engine that connects machine learning framework such as Tensorflow, Pytorch, or MxNet with customized platform (i.e. FPGA/ASIC). (b) Utilize existing compiler frameworks (i.e. XLA, Glow, nGraph, TVM, MLIR etc.) to parse a computation graph. (c) Design a search framework to search optimized operators’ mapping, sharding, tiling and memory allocation. Analyze and compare different search algorithms and search strategies. (d) Understand the characteristics of a customized hardware and develop backend that deploys computation loads to the processing units. Implement the instruction compiler to generate instructions for operator processing engines according to the ISA(Instruction set architecture). (e) Develop benchmarking and profiling tools to optimize computation loads and analyze performance bottlenecks for widely used machine learning models. Optimize searching strategy by comparing the performance between automated generated computation graph and manually designed computation graph.