1. ASIC/FPGA Design Verification Engineer
Location: Silicon Valley, Shenzhen or Shanghai
Work with RTL designers for ASIC/FPGA system verification.
2. Firmware Engineer
Location: Silicon Valley, Shenzhen or Shanghai
Develop critical firmware architecture that will be utilized across AI accelerate engine
3. ASIC/FPGA Design Engineer
Location: Silicon Valley, Shenzhen or Shanghai
You will work with the hardware and software teams to design an ASIC/FPGA system for CNN accelerate engine.
4. Machine Learning Scientist
Location: Silicon Valley, Shenzhen or Shanghai
Understand and improve upon state-of-the-art algorithms in model compression and inference/training acceleration.
5. Machine Learning Framework Engineer
Location: Silicon Valley, Shenzhen or Shanghai
Develop inference engine that connects ML framework such as Tensorflow, Pytorch, or MxNet with customized platform (i.e. FPGA/ASIC).
6. Machine Learning Application Engineer
Location: Silicon Valley, Shenzhen or Shanghai
Utilize existing frameworks (i.e. Tensorflow/Pytorch) and toolchains developed by the company to train models, compress models, and accelerate model inference.
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