Work with Architecture and Software teams to ensure micro-architecture and design is fully verified/validated across multiple platforms

Work with software and hardware engineering groups to design AI accelerator and SoC

Responsible for SoC system functions and feasibility analysis of AI chips

In this role, you’ll architect, simulate, and design amazing machine learning accelerator architecture for Moffett AI solutions. You will interact with cross functional engineering teams to identify opportunities and requirements. Some of the job duties include:

Be responsible for the deployment and optimization of the deep learning model on the end / cloud

Research, design, and develop a platform for automated model parsing, mapping optimization, instruction compiling and performance evaluation: (a) Develop inference engine that connects machine learning framework such as Tensorflow, Pytorch, or MxNet with customized platform (i.e. FPGA/ASIC). (b) Utilize existing compiler frameworks (i.e. XLA, Glow, nGraph, TVM, MLIR etc.) to parse a computation graph. (c) Design a search framework to search optimized operators’ mapping, sharding, tiling and memory allocation. Analyze and compare different search algorithms and search strategies. (d) Understand the characteristics of a customized hardware and develop backend that deploys computation loads to the processing units. Implement the instruction compiler to generate instructions for operator processing engines according to the ISA(Instruction set architecture). (e) Develop benchmarking and profiling tools to optimize computation loads and analyze performance bottlenecks for widely used machine learning models. Optimize searching strategy by comparing the performance between automated generated computation graph and manually designed computation graph.

Understand and improve upon state-of-the-art algorithms in model compression and inference/training acceleration.